The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly relates to a technique effectively applied to a semiconductor device including a fin transistor.
A fin field effect transistor is known as a field effect transistor that operates at high speed, and allows a reduction in leakage current, power consumption, and size. The fin field effect transistor (FINFET) is, for example, a semiconductor element that has a channel layer including a pattern of a plate-like (wall-like) semiconductor layer protruding above a substrate, and has a gate electrode formed so as to straddle the pattern.
The electrically erasable and programmable read only memory (EEPROM) is widely used as an electrically writable and erasable, nonvolatile semiconductor memory device. Such memory devices typified by a currently widely used flash memory each have a conductive floating gate electrode surrounded by an oxide film or a trapping insulating film below a gate electrode of a MISFET, and a charge storage state in the floating gate or the trapping insulating film is used as memory information, and is read as a threshold of the transistor. The trapping insulating film refers to a charge-storable insulating film, and includes, for example, a silicon nitride film. Electron charges are injected or emitted into/from such a charge storage region to shift the threshold of the MISFET so that the MISFET operates as a memory element. Such a flash memory includes a split gate cell using a metal-oxide-nitride-oxide-semiconductor (MONOS) film.
Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2013-504221 describes a split gate flash memory having a FINFET.
Japanese Unexamined Patent Application Publication No. 2016-51735 describes a split gate MONOS memory, in which a memory gate electrode is formed of a polysilicon film and a metal film on the polysilicon film.